MEMS technology is employed in many sensors, such as accelerometers, and gyroscopes. Many MEMS employ a released proof mass that is to experience a physical displacement relative to a substrate, or frame relatively more rigidly coupled to the substrate, in response to an external stimulus. Detection of this physical displacement may be detrimentally impacted by insufficient mass and/or residual stresses in the MEMS structure, particularly stress gradients across a metal film thickness, which cause a structure to statically deflect upon its release from the substrate.
To date, commercial MEMS sensor implementations rely on a “two-chip” approach where the MEMS structure is contained on a first chip while a control circuit is provided on another (e.g., an ASIC). For this approach, the MEMS structure is typically fabricated in bulk silicon substrate layers (e.g., an SOI layer), or surface micromachined into a polycrystalline semiconductor layer (e.g., silicon or SiGe). In general, for either of these techniques, the structural semiconductor material has very good mechanical properties with low intrinsic stress and also has a relative large thickness compared to thin films that are built-up upon the substrate through fabrication of CMOS circuitry, for example.
The two-chip approach however suffers from higher costs and larger form factors than would a single chip solution. Single-chip approaches have been hindered by the need to have the MEMS structures formed from low-stress bulk semiconductor films. Thin film structures capable of achieving high mass while remaining tolerant of intrinsic film stress would permit greater MEMS performance and permit further integration of MEMS with conventional integrated circuit technology, such as CMOS, facilitating a single-chip solution.